NDLI: On-chip testing of embedded silicon transducers

Content Provider	IEEE Xplore Digital Library
Author	Mir, S. Charlot, B. Rufer, L. Courtois, B.
Copyright Year	2004
Description	Author affiliation: TIMA Lab., Grenoble, France (Mir, S.; Charlot, B.; Rufer, L.; Courtois, B.)
Abstract	System-on-chip (SoC) technologies are evolving towards the integration of highly heterogeneous devices, including hardware of a different nature, such as digital, analog and mixed-signal, together with software components. Embedding transducers, as predicted by technology roadmaps, is yet another step in this continuous search for higher levels of integration and miniaturisation. Embedded transducers fabricated with silicon/CMOS compatible technologies may have more limitations than transducers fabricated with fully dedicated technologies. However, they offer industry the possibility of providing low cost applications for very large market niches, while still keeping acceptable transducer sensitivity. This is the case, for example, for accelerometers, micromirrors display devices or CMOS imagers. Embedded transducers are analog components. But given the fact that they work with signals other than electrical, the test of these embedded parts poses new challenges. Test technology for SoC devices is rapidly maturing but many difficulties still remain, in particular for addressing the test of analog and mixed-signal parts. In this paper, we present our work in the field of MEMS (microelectromechanical systems) on-chip testing with a brief overview of the state-of-the-art.
Sponsorship	IEEE Circuits and Syst. Soc
Starting Page	13
Ending Page	18
File Size	559637
Page Count	6
File Format	PDF
ISBN	0780384458
DOI	10.1109/SOCC.2004.1362334
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2004-09-12
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Testing Silicon Transducers CMOS technology System-on-a-chip CMOS image sensors Hardware Costs Accelerometers Micromirrors
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

On-chip testing of embedded silicon transducers

On-chip testing of embedded transducers

A CMOS imaging chip for real-time range finding

Implementation and prototyping of a complex multi-project system-on-a-chip

A proven qualification methodology for embedded CMOS memory compilers

Design of radiation tolerant CMOS APS system-on-a-chip image sensors

Smooth Boundary Point Adaptive Quantizer for on-chip Image Compression

A model for imaging system-on-chip manufacturing costs

Programmable System-on-Chip (SoC) for silicon prototyping

On-chip testing of embedded silicon transducers

Similar Documents

On-chip testing of embedded silicon transducers

On-chip testing of embedded transducers

A CMOS imaging chip for real-time range finding

Implementation and prototyping of a complex multi-project system-on-a-chip

A proven qualification methodology for embedded CMOS memory compilers

Design of radiation tolerant CMOS APS system-on-a-chip image sensors

Smooth Boundary Point Adaptive Quantizer for on-chip Image Compression

A model for imaging system-on-chip manufacturing costs

Programmable System-on-Chip (SoC) for silicon prototyping

On-chip testing of embedded silicon transducers