NDLI: Parallelization of Kvazaar HEVC intra encoder for multi-core processors

Content Provider	IEEE Xplore Digital Library
Author	Koivula, A. Viitanen, M. Vanne, J. Hamalainen, T.D. Fasnacht, L.
Copyright Year	2015
Description	Author affiliation: Dept. of Pervasive Comput., Tampere Univ. of Technol., Tampere, Finland (Koivula, A.; Viitanen, M.; Vanne, J.; Hamalainen, T.D.) \|\| SCI-STI-MM, Ecole Polytech. Fed. de Lausanne, Lausanne, Switzerland (Fasnacht, L.)
Abstract	This paper introduces key parallelization strategies of our Kvazaar HEVC intra encoder for multicore processors. The schemes implemented in Kvazaar are 1) tiles; 2) Wavefront Parallel Processing (WPP); and 3) picture-level parallel processing. Kvazaar is the only practical open-source HEVC encoder that supports all these schemes. In addition, its rate-distortion-complexity characteristics are superior to other public implementations in all-intra (AI) coding. Our experiments with high-quality encoder presets show that a C implementation of Kvazaar is 19% faster than the corresponding implementation of x265 for the same coding efficiency with 8 threads and 38% faster with 16 threads. With the high-speed presets, Kvazaar improves coding efficiency by 4.5% while being twice as fast as x265. The high-speed preset of Kvazaar obtains almost the same coding efficiency as the high-quality preset of f265 while being 24 times faster when 16 threads are used.
Starting Page	1
Ending Page	6
File Size	3075577
Page Count	6
File Format	PDF
e-ISBN	9781467396042
DOI	10.1109/SiPS.2015.7345015
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2015-10-14
Publisher Place	China
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Encoding Parallel processing Instruction sets Open source software Transforms Video coding Artificial intelligence Wavefront Parallel Processing (WPP) HEVC intra coding Kvazaar HEVC encoder tiles
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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