NDLI: FPGA implementation of correlation and ML channel estimation for long code CDMA systems

Content Provider	IEEE Xplore Digital Library
Author	Elnamaky, M. Massicotte, D.
Copyright Year	2010
Description	Author affiliation: Department of Electrical Engineering, Université du Québec, Trois-Rivières, G9A-5H7, CA (Massicotte, D.) \|\| Prince Sultan Advanced Technology Research Institute, King Saud University, Riyadh,11421, SA (Elnamaky, M.)
Abstract	The estimation of channel delays along with their respective complex channel coefficients of different users constitutes the first stage in the detection process at the receiving base station in a CDMA communication system. This stage forms the bottleneck for the detection of users' bit streams; both in terms of accuracy as well as execution time. In this paper, we address the problem of channel estimation in the complex scenario involving multiple users, multiple paths, and fading channels in CDMA systems. We will highlight a simple pipelined architecture for recursive channel estimators and describe the implementation issues related to the dominant type of operations, data flows, structure regularities, FPGA implementation and further figures to discuss the WCDMA real-time requirements in terms of processing capabilities..
Starting Page	418
Ending Page	421
File Size	696542
Page Count	4
File Format	PDF
ISBN	9781424471652
e-ISBN	9781424471676
DOI	10.1109/ISSPA.2010.5605456
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2010-05-10
Publisher Place	Malaysia
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Channel estimation Noise CDMA FPGA Channel Estimation
Content Type	Text
Resource Type	Article

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