NDLI: Baseband MIMO receiver architecture for MC-CDMA and its FPGA implementation

Content Provider	IEEE Xplore Digital Library
Author	LaRoche, I. Roy, S. Fortier, P. Beaumont, J.-F.
Copyright Year	2010
Description	Author affiliation: Department of Electrical and Computer Engineering, Laval University, Quebec, G1V 0A6, Canada (LaRoche, I.; Roy, S.; Fortier, P.) \|\| Defence Research and Development Canada, Ottawa, Ontario, K1A 0Z4, Canada (Beaumont, J.-F.)
Abstract	A baseband multi-input, multi-output (MIMO) multi-carrier code division multiple access (MC-CDMA) downlink system meeting wideband CDMA (WCDMA) bandwidth requirements is simulated and its receiver part is implemented into a field programmable gate array (FPGA). The receiver was designed by integrating an existing single-input, single-output (SISO) fixed-point MC-CDMA receiver with an existing floating-point MIMO receiver. The receiver employs temporal multiplexing in order to use a single Vertical Bell Laboratories LAyered Space-Time (V-BLAST) detector. Simulation results of a complete MIMO MC-CDMA system show improvements over the SISO case. Implementation results show that it is possible to implement this receiver design into a single FPGA device.
Starting Page	749
Ending Page	752
File Size	300263
Page Count	4
File Format	PDF
ISBN	9781424477432
e-ISBN	9781424477425
e-ISBN	9781424477418
DOI	10.1109/WIMOB.2010.5644864
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2010-10-11
Publisher Place	Canada
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Wireless communication Multicarrier code division multiple access Channel estimation Receivers Detectors MIMO
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in