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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Enjeti, P. Shireen, W. |
| Copyright Year | 1990 |
| Description | Author affiliation: Dept. of Electr. Eng., Texas A&M Univ., College Station, TX, USA (Enjeti, P.; Shireen, W.) |
| Abstract | A new proposal to reject DC-link voltage ripple in inverters operating on programmed PWM (pulse width modulation) waveforms is examined in detail. It is demonstrated how continuous elimination of harmonics is achieved at the inverter output while simultaneously rejecting the DC-link voltage ripple. Thus, with the proposed technique, high-quality voltage is guaranteed at the inverter output terminals even with a substantial low-frequency voltage ripple on the DC-link. A thorough modeling of this technique, along with the tradeoffs involved in acquiring the immunity to DC-link ripple, is illustrated in detail. Potential applications of the proposed technique are in fixed and variable frequency inverters for power supplies and AC motor drives which experience voltage ripple in the DC-link, such as when fed from a weak AC-system which is frequently unbalanced. A design procedure and the digital implementation of the proposed technique are described. Selected results are verified experimentally on a laboratory inverter. |
| Starting Page | 705 |
| Ending Page | 713 |
| File Size | 563678 |
| Page Count | 9 |
| File Format | |
| DOI | 10.1109/PESC.1990.131258 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 1990-01-01 |
| Publisher Place | USA |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Pulse width modulation inverters Voltage Power harmonic filters Frequency Pulse width modulation Rectifiers Laboratories Proposals Pulsed power supplies Power electronics |
| Content Type | Text |
| Resource Type | Article |
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