NDLI: PC clusters for signal processing: an early prototype

Content Provider	IEEE Xplore Digital Library
Author	Chapin, J. Chiu, A. Hu, R.
Copyright Year	2000
Description	Author affiliation: Lab. for Comput. Sci., MIT, Cambridge, MA, USA (Chapin, J.)
Abstract	A cluster of commodity personal computers (PCs) is an attractive platform for signal processing, especially for applications like sensor arrays where there is significant parallelism in the computation. This paper reports the results of experiments with several small cluster configurations to explore the opportunities and limitations of this approach. Experiments included uniprocessor and multiprocessor PCs, 100 Mbit/sec and 1 Gbit/sec Ethernet. All experiments were receive-only, starting from raw spectrum samples provided by a wideband A/D card, and all signal processing code ran as application processes on top of standard Linux. The applications used to drive the experiments were delay and sum beamforming and the simultaneous reception of multiple AMPS cellular channels. The current standard PCI I/O bus (32 bits at 33 MHz) was the most significant bottleneck in the experiments. This suggests that the arrival of the next generation of commodity PCs, with faster I/O busses (such as 64-bit PCI at 66 MHz), may open the door to their use as a low-cost platform for a variety of low-end real-time signal processing applications.
Starting Page	525
Ending Page	529
File Size	451714
Page Count	5
File Format	PDF
ISBN	0780363396
DOI	10.1109/SAM.2000.878064
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2000-03-17
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Signal processing Prototypes Array signal processing Personal communication networks Sensor arrays Microcomputers Application software Parallel processing Concurrent computing Ethernet networks
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
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3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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