NDLI: Application of parallel processors to real-time sensor array processing

Content Provider	IEEE Xplore Digital Library
Author	Martinez, D.R.
Copyright Year	1999
Description	Author affiliation: Lincoln Lab., MIT, Lexington, MA, USA (Martinez, D.R.)
Abstract	Historically, most radar sensor array processing has been implemented using dedicated and specialized processing systems. This approach was necessary because the algorithm computation requirements were several orders of magnitude higher than any commercial supercomputer could provide in an acceptable size, weight and power. Most recently, with the interest by the military to employ commercial-off-the-shelf (COTS) technology, and the rapid advances in computation throughput by COTS supercomputers, we are able to meet the present algorithm requirements with COTS massively parallel processors (MPPs). However, there are still many issues to be overcome to get the most out of a parallel processor for our application. Some of the important issues are the balance between high computation throughput and total exchange communication over the processor network, message passing or shared memory access with high communication throughput for small message sizes, and the scalability of these machines to more demanding algorithm and application requirements. In this paper we present the application requirements, review the important computational kernels, and conclude with our experiences in evaluating representative MPPs.
Starting Page	463
Ending Page	469
File Size	78077
Page Count	7
File Format	PDF
ISBN	0769501435
DOI	10.1109/IPPS.1999.760518
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1999-04-12
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Sensor arrays Military computing Throughput Supercomputers Radar Sensor systems Array signal processing Concurrent computing Computer networks Message passing
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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