NDLI: Effect of flag design on thermal performance of PBGA packages

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Effect of flag design on thermal performance of PBGA packages

Content Provider	IEEE Xplore Digital Library
Author	Joiner, B.
Copyright Year	2001
Description	Author affiliation: Semicond. Products Sector, Motorola Inc., Austin, TX, USA (Joiner, B.)
Abstract	In order to meet performance requirements, the package design of the 272 27/spl times/27 mm PBGA package must incorporate the best possible thermal path from the die to the printed circuit board to which the package is attached. Unfortunately, the reliability requirements for passing moisture resistance are more easily passed with a minimum amount of copper under the die. This paper reports finite element thermal simulations predicting the effect of the design options on thermal performance. Switching from a solid flag with a solid spreader pad on the bottom of the substrate to a minimal copper design would cause about 3 to 6/spl deg/C/watt increase in junction temperature.
Sponsorship	IEEE Components, Packaging, Manuf. Technol. Soc
Starting Page	223
Ending Page	227
File Size	598861
Page Count	5
File Format	PDF
ISBN	0780366492
DOI	10.1109/STHERM.2001.915182
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2001-03-22
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Copper Thermal resistance Semiconductor device packaging Substrates Moisture Finite element methods Solid modeling Semiconductor device testing Temperature Thermal conductivity
Content Type	Text
Resource Type	Article

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