Please wait, while we are loading the content...
Please wait, while we are loading the content...
| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Shukla, S. Pandey, B. |
| Copyright Year | 2014 |
| Description | Author affiliation: Dept. of Phys. & Electron., Dr. Ram Manohar Lohia Avadh Univ., Faizabad, India (Shukla, S.; Pandey, B.) |
| Abstract | A New circuit model of two-stage small-signal amplifier using Darlington and Sziklai pairs is proposed for the first time. Proposed circuit is obtained by cascading a small-signal Darlington pair amplifier with that of Sziklai pair based small-signal amplifier with minor modifications. Proposed amplifier essentially uses two additional biasing resistances in its design. It crops considerably high voltage and current gain (345.523 and 464.357 respectively) with audible range bandwidth of 43.363 KHz for AC input signals swinging in 10-30mV range at 1KHz or lower frequency. Proposed circuit-architecture successfully removes the poor response problem of conventional Darlington pair amplifiers at higher frequencies and narrow bandwidth problem of recently announced (by authors) circuits of small-signal Sziklai pair amplifier. Variations in voltage gain with frequency and various biasing components like biasing resistances, DC supply voltage and coupling capacitors are discussed in length. Temperature sensitivity of performance parameters, THD and small-signal AC equivalent circuit analysis of the proposed circuit are elaborately studied. Proposed design can be implemented in cascadable gain blocks for receivers, 715Hz-44KHz frequency range power sources and in the circuits where reproduction of signal with simultaneously high voltage and current gain is the prime requirement. |
| Starting Page | 13 |
| Ending Page | 16 |
| File Size | 1027199 |
| Page Count | 4 |
| File Format | |
| ISBN | 9781479957606 |
| DOI | 10.1109/SMELEC.2014.6920783 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2014-08-27 |
| Publisher Place | Malaysia |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Resistance Transistors Bandwidth Capacitors Integrated circuit modeling Couplings Physics Simulation Two-stage small-signal amplifiers Sziklai pair Amplifiers Darlington Pair Circuit design |
| Content Type | Text |
| Resource Type | Article |
National Digital Library of India (NDLI) is a virtual repository of learning resources which is not just a repository with search/browse facilities but provides a host of services for the learner community. It is sponsored and mentored by Ministry of Education, Government of India, through its National Mission on Education through Information and Communication Technology (NMEICT). Filtered and federated searching is employed to facilitate focused searching so that learners can find the right resource with least effort and in minimum time. NDLI provides user group-specific services such as Examination Preparatory for School and College students and job aspirants. Services for Researchers and general learners are also provided. NDLI is designed to hold content of any language and provides interface support for 10 most widely used Indian languages. It is built to provide support for all academic levels including researchers and life-long learners, all disciplines, all popular forms of access devices and differently-abled learners. It is designed to enable people to learn and prepare from best practices from all over the world and to facilitate researchers to perform inter-linked exploration from multiple sources. It is developed, operated and maintained from Indian Institute of Technology Kharagpur.
Learn more about this project from here.
NDLI is a conglomeration of freely available or institutionally contributed or donated or publisher managed contents. Almost all these contents are hosted and accessed from respective sources. The responsibility for authenticity, relevance, completeness, accuracy, reliability and suitability of these contents rests with the respective organization and NDLI has no responsibility or liability for these. Every effort is made to keep the NDLI portal up and running smoothly unless there are some unavoidable technical issues.
Ministry of Education, through its National Mission on Education through Information and Communication Technology (NMEICT), has sponsored and funded the National Digital Library of India (NDLI) project.
| Sl. | Authority | Responsibilities | Communication Details |
|---|---|---|---|
| 1 | Ministry of Education (GoI), Department of Higher Education |
Sanctioning Authority | https://www.education.gov.in/ict-initiatives |
| 2 | Indian Institute of Technology Kharagpur | Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project | https://www.iitkgp.ac.in |
| 3 | National Digital Library of India Office, Indian Institute of Technology Kharagpur | The administrative and infrastructural headquarters of the project | Dr. B. Sutradhar bsutra@ndl.gov.in |
| 4 | Project PI / Joint PI | Principal Investigator and Joint Principal Investigators of the project |
Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon |
| 5 | Website/Portal (Helpdesk) | Queries regarding NDLI and its services | support@ndl.gov.in |
| 6 | Contents and Copyright Issues | Queries related to content curation and copyright issues | content@ndl.gov.in |
| 7 | National Digital Library of India Club (NDLI Club) | Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach | clubsupport@ndl.gov.in |
| 8 | Digital Preservation Centre (DPC) | Assistance with digitizing and archiving copyright-free printed books | dpc@ndl.gov.in |
| 9 | IDR Setup or Support | Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops | idr@ndl.gov.in |
|
Loading...
|