NDLI: A pseudo-BiCMOS high gain-bandwidth low noise operational amplifier using a Darlington input stage

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1995 IEEE International Symposium on Circuits and Systems

Volume 2 - 1995

Volume 1 - 1995

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1993 IEEE International Symposium on Circuits and Systems

[Proceedings] 1992 IEEE International Symposium on Circuits and Systems

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A pseudo-BiCMOS high gain-bandwidth low noise operational amplifier using a Darlington input stage

Content Provider	IEEE Xplore Digital Library
Author	Holman, W.T. Connelly, J.A.
Copyright Year	1995
Description	Author affiliation: Sch. of Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA, USA (Holman, W.T.; Connelly, J.A.)
Abstract	A high gain-bandwidth low noise operational amplifier using lateral PNP bipolar transistors in the input stage has been fabricated in a standard 1.2 /spl mu/m digital n-well CMOS process. The op amp has an area of 0.216 mm/sup 2/ with E/sub u/=7.3 nV//spl radic/(Hz), I/sub n/=0.20 pA//spl radic/(Hz), E/sub n/ and I/sub n/ 1/f noise corner frequencies less than 25 Hz, a -3 dB bandwidth of 4.5 MHz with a closed loop gain of 53 dB, a minimum PSRR (DC) of 68 dB, a CMRR (DC) of 100 dB, a minimum output slew rate of 39 V//spl mu/s, and a quiescent current of 2.1 mA at supply voltages of /spl plusmn/2.5 V.
Starting Page	1724
Ending Page	1727
File Size	546448
Page Count	4
File Format	PDF
ISBN	0780325702
DOI	10.1109/ISCAS.1995.523745
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1995-04-30
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Low-noise amplifiers Operational amplifiers MOSFETs Bipolar transistors CMOS process Voltage CMOS technology Frequency Bandwidth Integrated circuit noise
Content Type	Text
Resource Type	Article

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