NDLI: Interface electronics design for POSFET devices based tactile sensing systems

Content Provider	IEEE Xplore Digital Library
Author	Barboni, L. Dahiya, R.S. Metta, G. Valle, M.
Copyright Year	2010
Description	Author affiliation: DIBE, University of Genova, 16145, Italy (Barboni, L.; Valle, M.) \|\| RBCS, Italian Institute of Technology, 16163, Genova, Italy (Dahiya, R.S.; Metta, G.)
Abstract	This work presents the development of novel POSFET (Piezoelectric Oxide Semiconductor Field Effect Transistor) devices based tactile sensing system. The tactile sensing system, primarily developed for the robotic applications, consists of 5×5 POSFET touch sensing array and the associated read out and data acquisition system. The POSFET touch sensing devices are obtained by spin coating piezoelectric polymer P(VDF-TrFE), poly(vinylidene fluoride - trifluoroethylene), film on the gate area of MOS (Metal Oxide Semiconductor) devices and polarizing the film in situ. To detect contact events, the taxels utilize the contact forces induced change in the polarization level (and hence change in the induced channel current) of piezoelectric polymer. Both, individual taxels and the array are designed to match spatio-temporal performance of the human fingertips. The data acquisition system is implemented with off-the-shelf electronic components and its design takes into account both the application related requirements as well as the constraints posed by existing hardware on the humanoid robot ‘iCub’. The biasing scheme for using POSFET devices and the problems thereof are also been discussed.
Starting Page	686
Ending Page	690
File Size	1110390
Page Count	5
File Format	PDF
ISBN	9781424479917
ISSN	19449445
e-ISBN	9781424479900
DOI	10.1109/ROMAN.2010.5598610
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2010-09-13
Publisher Place	Italy
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Robot sensing systems Arrays Data acquisition Humans Logic gates
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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