NDLI: Inexact floating-point adder for dynamic image processing

Content Provider	IEEE Xplore Digital Library
Author	Weiqiang Liu Linbin Chen Wang, C. O'Neill, M. Lombardi, F.
Copyright Year	2014
Description	Author affiliation: Dept. of Electr. & Comput. Eng., Northeastern Univ., Boston, MA, USA (Linbin Chen; Lombardi, F.) \|\| Coll. of Electron. Inf. & Eng., Nanjing Univ. of Aeronaut. & Astronaut., Nanjing, China (Weiqiang Liu; Wang, C.) \|\| Inst. of Electron., Queen's Univ. of Belfast, Belfast, UK (O'Neill, M.)
Abstract	Power has become a key constraint in current nanoscale integrated circuit design due to the increasing demands for mobile computing and a low carbon economy. As an emerging technology, an inexact circuit design offers a promising approach to significantly reduce both dynamic and static power dissipation for error tolerant applications. Although fixed-point arithmetic circuits have been studied in terms of inexact computing, floating-point arithmetic circuits have not been fully considered although require more power. In this paper, the first inexact floating-point adder is designed and applied to high dynamic range (HDR) image processing. Inexact floating-point adders are proposed by approximately designing an exponent subtractor and mantissa adder. Related logic operations including normalization and rounding modules are also considered in terms of inexact computing. Two HDR images are processed using the proposed inexact floating-point adders to show the validity of the inexact design. HDR-VDP is used as a metric to measure the subjective results of the image addition. Significant improvements have been achieved in terms of area, delay and power consumption. Comparison results show that the proposed inexact floating-point adders can improve power consumption and the power-delay product by 29.98% and 39.60%, respectively.
Starting Page	239
Ending Page	243
File Size	414739
Page Count	5
File Format	PDF
ISBN	9781479956227
DOI	10.1109/NANO.2014.6967953
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2014-08-18
Publisher Place	Canada
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Adders Dynamic range Floating-point arithmetic Power demand Hardware Logic gates High-dynamic range image Inexact computing Floating-point adders Low power
Content Type	Text
Resource Type	Article

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