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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Karsi, M.F. Lindsey, W.C. |
| Copyright Year | 1994 |
| Description | Author affiliation: Dept. of Electr. Eng. Syst., Univ. of Southern California, Los Angeles, CA, USA (Karsi, M.F.) |
| Abstract | This paper focuses on the modeling and analysis of phase locked loops in the presence of CW interference such that the operating vulnerability to CW jamming and interference can be accessed. In the absence of noise the loop phase error signal is characterized analytically and the conditions under which the loop remains locked to the desired carrier are presented. Contrary to previous literature, analysis has been conducted for arbitrary detuning between the desired carrier and the quiescent voltage controlled oscillator (VCO) frequencies. The results show that loop performance degradation depends on the frequencies of the interferer and the desired signal relative to the center (quiescent) VCO frequency; it also depends upon the interference power to the desired signal power ratio. In the presence of noise and interference, a model which manifests the time evolution of the phase error process is developed. A Fokker Planck analysis is conducted on this model in order to illustrate the method and obtain insight into system performance in the presence of interferer. |
| Starting Page | 301 |
| Ending Page | 305 |
| File Size | 474375 |
| Page Count | 5 |
| File Format | |
| ISBN | 0780318285 |
| DOI | 10.1109/MILCOM.1994.473923 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 1994-10-02 |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Interference Voltage-controlled oscillators Frequency Phase noise Power system modeling Phase locked loops Jamming Signal analysis Degradation Performance analysis |
| Content Type | Text |
| Resource Type | Article |
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