NDLI: A simple method for real-time DSP-based neutron chopper speed and phase control

Content Provider	IEEE Xplore Digital Library
Author	Rose, C.R. Lara, P.D. Nelson, R.O.
Copyright Year	2001
Description	Author affiliation: Los Alamos Nat. Lab., NM, USA (Rose, C.R.)
Abstract	Spallation-neutron facilities often use precisely-phased rotating choppers to parse the neutron beams that are used in various experiments. Typically, the reference signal is a digital pulse train of nearly-constant frequency. A chopper provides phase and frequency information to a controller by outputting a digital pulse each time its rotating blade passes a top-dead-center (TDC) location. Early controller designs used analog techniques to measure speed and phase and perform the necessary closed-loop control. More recently, purely digital techniques using digital signal processors (DSPs) and counter-based phase detectors have been implemented. This paper describes a relatively simple and low-cost method of implementing chopper speed and phase control with an off-the-shelf DSP card. In this technique, the reference and chopper-TDC digital-pulse trains are slew-rate limited to form trapezoidal waveforms which are sampled by 16-bit ADCs on the DSP board. The DSP finds the zero crossings, computes the frequency and relative phase of the two input signals and performs the dual-loop feedback control functions. A 16-bit DAC outputs a control voltage to a chopper-motor power driver. The paper also describes the rate-limiting circuitry, the real-time dual-loop control algorithm, and system performance.
Sponsorship	U.S. Dept. Energy
Starting Page	1444
Ending Page	1446
File Size	396516
Page Count	3
File Format	PDF
ISBN	0780371917
DOI	10.1109/PAC.2001.986708
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2001-06-18
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Neutrons Choppers Digital signal processing Frequency Particle beams Blades Velocity measurement Phase measurement Performance evaluation Digital signal processors
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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