NDLI: UPC benchmarking issues

Content Provider	IEEE Xplore Digital Library
Author	El-Ghazawi, T. Chauvin, S.
Copyright Year	2001
Description	Author affiliation: Sch. of Comput. Sci., George Mason Univ., Fairfax, VA, USA (El-Ghazawi, T.; Chauvin, S.)
Abstract	UPC, or Unified Parallel C, is a parallel extension of ANSI C. UPC is developed around the distributed shared-memory programming model with constructs that can allow programmers to exploit memory locality, by placing data close to the threads that manipulate them in order to minimize remote accesses. Under the UPC memory sharing model, each thread owns a private memory and has a logical association (affinity) with a partition of the shared memory. This paper discusses an early release of UPC Bench, a benchmark designed to reveal UPC compilers performance weaknesses to uncover opportunities for compiler optimizations. The experimental results from UPC Bench over the Compaq AlphaServer SC show that UPC Bench is capable of discovering such compiler performance problems. Further, it shows that if such performance pitfalls are avoided through compiler optimizations, distributed shared memory programming paradigms can result in high-performance, while the ease of programming is enjoyed.
Sponsorship	Int. Assoc. Comput. & Commun
Starting Page	365
Ending Page	372
File Size	755743
Page Count	8
File Format	PDF
ISBN	0769512577
ISSN	01903918
DOI	10.1109/ICPP.2001.952082
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2001-09-03
Publisher Place	Spain
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Yarn Distributed computing Programming profession Optimizing compilers Program processors Concurrent computing Drives Parallel programming Design optimization High performance computing
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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