NDLI: Analyzing the individual/combined effects of speculative and guarded execution on a superscalar architecture

Content Provider	IEEE Xplore Digital Library
Author	Srinivas, M. Nicolau, A.
Copyright Year	1998
Description	Author affiliation: Silicon Graphics Inc., Mountain View, CA, USA (Srinivas, M.)
Abstract	Speculative execution is a technique by which instructions are executed before the condition that controls it is evaluated. This can increase the performance if some of the idle CPU cycles are now used to execute speculated instructions. Guarded execution is a technique in which the branch instruction is eliminated and control dependencies are converted to data dependencies. This can help reduce some of the side-effects involved with branch instructions besides creating larger compilation units. However, excessive application of either one of them can result in dismal performance. Conventional approaches have used a one-time feedback metric and made all decisions based on it. We present a new way of designing feedback metrics and show how it can be used to regulate the effects of dynamic speculation and the side-effects of applying guarded execution statically. The proposed method presents 0.3 to 0.6-fold improvements over a conventional scheme using SPEC benchmarks.
Starting Page	199
Ending Page	208
File Size	983524
Page Count	10
File Format	PDF
ISBN	0818684046
ISSN	10637133
DOI	10.1109/IPPS.1998.669911
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1998-03-30
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Hardware Feedback Parallel processing Silicon Graphics Processor scheduling Computer science Pipeline processing
Content Type	Text
Resource Type	Article

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