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Content Provider | IEEE Xplore Digital Library |
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Author | Qishi Wu Yi Gu |
Copyright Year | 2010 |
Abstract | Many large-scale scientific applications feature distributed computing workflows of complex structures that must be executed and transferred in shared wide-area networks consisting of unreliable nodes and links. Mapping these computing workflows in such faulty network environments for optimal latency while ensuring certain fault tolerance is crucial to the success of eScience that requires both performance and reliability. We construct analytical cost models and formulate workflow mapping as an optimization problem under failure rate constraint. We propose a distributed heuristic mapping solution based on recursive critical path to achieve minimum end-to-end delay and satisfy a pre-specified overall failure rate for a guaranteed level of fault tolerance. The performance superiority of the proposed mapping solution is illustrated by extensive simulation-based comparisons with existing mapping algorithms. |
Starting Page | 508 |
Ending Page | 515 |
File Size | 240336 |
Page Count | 8 |
File Format | |
ISBN | 9781424497270 |
ISSN | 15219097 |
DOI | 10.1109/ICPADS.2010.38 |
Language | English |
Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
Publisher Date | 2010-12-08 |
Publisher Place | China |
Access Restriction | Subscribed |
Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
Subject Keyword | Computational modeling Fault tolerance Fault tolerant systems Computer networks Delay Complexity theory Computers fault tolerance distributed algorithm end-to-end delay scientific workflow |
Content Type | Text |
Resource Type | Article |
Subject | Hardware and Architecture |
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