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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Oliver, T. Schmidt, B. Nathan, D. Clemens, R. Maskell, D. |
| Copyright Year | 2005 |
| Description | Author affiliation: Sch. of Comput. Eng., Nanyang Technol. Univ. (Oliver, T.; Schmidt, B.) |
| Abstract | Molecular biologists frequently compute multiple sequence alignments (MSAs) to identify similar regions in protein families. Progressive alignment is a widely used approach to compute MSAs. However, aligning a few hundred sequences by popular progressive alignment tools requires several hours on sequential computers. Due to the rapid growth of biological sequence databases biologists have to compute MSAs in a far shorter time. In this paper we present a new approach to MSA on reconfigurable hardware platforms to gain high performance at low cost. To derive an efficient mapping onto this type of architecture, fine-grained parallel processing elements (PEs) have been designed. Using this PE design as a building block we have constructed a linear systolic array to perform a pairwise sequence distance computation using dynamic programming. This results in an implementation with significant runtime savings on a standard off-the-shelf FPGA |
| Sponsorship | IEEE Comput. Soc. TCDP and TCPP Fukuoka Inst. of Technol. (FIT) |
| Starting Page | 326 |
| Ending Page | 330 |
| File Size | 190037 |
| Page Count | 5 |
| File Format | |
| ISBN | 0769522815 |
| ISSN | 15219097 |
| DOI | 10.1109/ICPADS.2005.202 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2005-07-20 |
| Publisher Place | Japan |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Field programmable gate arrays Biology computing Proteins Databases Hardware Performance gain Costs Computer architecture Parallel processing Systolic arrays |
| Content Type | Text |
| Resource Type | Article |
| Subject | Hardware and Architecture |
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