NDLI: Evaluation of a programmable cluster-based IP router

Content Provider	IEEE Xplore Digital Library
Author	Pradhan, P. Tzi-Cker Chiueh
Copyright Year	2002
Description	Author affiliation: Dept. of Comput. Sci., State Univ. of New York, Stony Brook, NY, USA (Pradhan, P.; Tzi-Cker Chiueh)
Abstract	A major challenge in Internet edge router design is to support both high packet forwarding performance and versatile and efficient packet processing capabilities. The thesis of this research project is that a cluster of PCs connected by a high speed system area network provides an effective hardware platform for building routers to be used at the edges of the Internet. This paper describes a scalable and extensible edge router architecture called Panama, which supports a novel aggregate route caching scheme, a real-time link scheduling algorithm whose performance overhead is independent of the number of real-time flows, a highly efficient kernel extension mechanism to safely load networking software extensions dynamically, and an integrated resource scheduler which ensures that real-time flows with additional packet processing requirements still meet their end-to-end performance requirements. This paper describes the implementation and evaluation of the first Panama prototype based on a cluster of PCs and Myrinet.
Sponsorship	IEEE Comput. Soc. Tech. Committee on Parallel Process. Nat. Central Univ. Ministr. Educ., ROCl Nat. Sci. Council, ROC
Starting Page	321
Ending Page	326
File Size	307019
Page Count	6
File Format	PDF
ISBN	0769517609
ISSN	15219097
DOI	10.1109/ICPADS.2002.1183419
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2002-12-17
Publisher Place	China
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Personal communication networks Internet Hardware Buildings IP networks Computer architecture Aggregates Scheduling algorithm Kernel Software performance
Content Type	Text
Resource Type	Article
Subject	Hardware and Architecture

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
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