NDLI: Accelerate the calculation of NURBS curves and surfaces based on parallel architecture

Content Provider	IEEE Xplore Digital Library
Author	Shih-Ching Ou Li-Hong Shiu Sung-Jung Hsiao Wen-Tsai Sung
Copyright Year	2002
Description	Author affiliation: Dept. of Electr. Eng., Nat. Central Univ., Taiwan (Shih-Ching Ou; Li-Hong Shiu)
Abstract	The aim of the paper is to propose a three-dimensional graphics chip with parallel architecture, in accordance with the chip of the NURBS algorithm was structured. This architecture presents a regular and easily scalable structure, suitable for VLSI implementation, which can be efficiently exploited for the computing process. This architecture can apply to a peripheral device of a computer and a user can use it for fitting curves and surfaces, convert NURBS curves to Bezier and so on, which have 16 bit precision. In this paper, we first describe the framework of the whole system. Secondly, we introduce the hardware of FPGA and explain the principle. Next, we will also illustrate NURBS, and test and verify using Visual C++ and OpenGL. The performance of the proposed architecture is improved by the use of carry save arithmetic which permits the reduction of the system time cycle.
Sponsorship	IEEE Comput. Soc. Tech. Committee on Parallel Process. Nat. Central Univ. Ministr. Educ., ROCl Nat. Sci. Council, ROC
Starting Page	245
Ending Page	250
File Size	274001
Page Count	6
File Format	PDF
ISBN	0769517609
ISSN	15219097
DOI	10.1109/ICPADS.2002.1183407
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2002-12-17
Publisher Place	China
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Acceleration Spline Surface topography Surface reconstruction Parallel architectures Computer architecture Surface fitting Computer graphics Very large scale integration Computer peripherals
Content Type	Text
Resource Type	Article
Subject	Hardware and Architecture

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