NDLI: An assertional proof of a lock synchronization algorithm using fetch and store atomic instructions

Content Provider	IEEE Xplore Digital Library
Author	Ting-Lu Huang Jann-Hann Lin
Copyright Year	1994
Description	Author affiliation: Dept. of Comput. Sci. & Inf. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan (Ting-Lu Huang)
Abstract	A new lock synchronization algorithm, proposed independently by Craig and the authors, not only eliminates memory contention caused by process spinning but also preserves first in first out property. A previous result, the MCS lock algorithm, requires both compare and swap and fetch and store instructions, or the FIFO property is lost and hence starvation may occur. The new one requires only fetch and store. We provide an assertional proof for the new algorithm. Most of behavioral proofs of concurrent programs are error-prone since it is difficult and tedious to take all possibilities of interleaving among the processes into consideration. An assertional proof replaces a large number of possibilities of interleaving by a small number of invariants. New techniques in this proof are: an assertional characterization of token bit accessibility; the definition of effective assignments that brings about the notion of token creation/destruction; the definition of token count that derives the mutual exclusion theorem; and the constructing procedure of a token-list that faithfully records the arrival time sequence of lock requests so that FIFO ordering can be enforced.
Starting Page	759
Ending Page	768
File Size	956921
Page Count	10
File Format	PDF
ISBN	0818665556
DOI	10.1109/ICPADS.1994.590470
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1994-12-19
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Spinning Computer science Interleaved codes Multiprocessing systems Stochastic processes Data structures Queueing analysis
Content Type	Text
Resource Type	Article

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