NDLI: Branch prediction for enhancing fine-grained parallelism in Prolog

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Keynote Address: The Prospects For Architecture-independent Parallel Programming

Plenary Address 1: Towards Teraflop Computing

Plenary Address 2: Computing in the '90s, Microsoft, and Supercomputers

Plenary Address 3: Heterogeneous Parallel Computing

Invited Mini-review Session 1: Object Technology And Distributed Operating Systems

Invited Mini-review Session 2: Software Specification Of Real-time Systems

Panel 1: Are We Providing The Right Education For Computer Science/engineering Students?

Panel 2: Is It Possible to Fairly Compare Interconnection Networks?

Panel 3: Taiwan's Information Superhighway: Technical Issues And Social Impacts

Panel 4: What Types Of Research Papers Should We Be Writing?

Panel 5: Parallel Processing: What Have We Done Wrong?

Panel 6: Parallel And Distributed Processing Research In Some Asian Countries

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Branch prediction for enhancing fine-grained parallelism in Prolog

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Branch prediction for enhancing fine-grained parallelism in Prolog

Content Provider	IEEE Xplore Digital Library
Author	Ruey-Liang Ma Chung-Ping Chung
Copyright Year	1994
Description	Author affiliation: Dept. of Comput. Sci. & Inf. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan (Ruey-Liang Ma)
Abstract	Branch instructions create barriers to instruction fetching, thus greatly reducing the fine-grained parallelism of programs. One common method for solving this problem is branch prediction. We first present four lemmas to clarify the relationship between the branch prediction hit rate and system performance, hardware efficiency, and branch prediction overhead. We then propose a new branch prediction method called PAM (Period Adaptive Method). An abstract model and detailed implementation of PAM are described. The prediction hit rate of this method was measured using ten Prolog benchmark programs and found to be 97%. When implemented in a superscalar Prolog system, PAM enhances the degree of system parallelism by 80%.
Starting Page	744
Ending Page	751
File Size	916426
Page Count	8
File Format	PDF
ISBN	0818665556
DOI	10.1109/ICPADS.1994.590462
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1994-12-19
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Prediction methods Parallel processing System performance Hardware Costs Computer science Chaos Decoding Performance gain History
Content Type	Text
Resource Type	Article

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