NDLI: F2C2-STM: Flux-Based Feedback-Driven Concurrency Control for STMs

Content Provider	IEEE Xplore Digital Library
Author	Ravichandran, K. Pande, S.
Copyright Year	2014
Description	Author affiliation: Coll. of Comput., Georgia Inst. of Technol., Atlanta, GA, USA (Ravichandran, K.; Pande, S.)
Abstract	Software Transactional Memory (STM) systems provide an easy to use programming model for concurrent code and have been found suitable for parallelizing many applications providing performance gains with minimal programmer effort. With increasing core counts on modern processors one would expect increasing benefits. However, we observe that running STM applications on higher core counts is sometimes, in fact, detrimental to performance. This is due to the larger number of conflicts that arise with a larger number of parallel cores. As the number of cores available on processors steadily rise, a larger number of applications are beginning to exhibit these characteristics. In this paper we propose a novel dynamic concurrency control technique which can significantly improve performance (up to 50%) as well as resource utilization (up to 85%) for these applications at higher core counts. Our technique uses ideas borrowed from TCP's network congestion control algorithm and uses self-induced concurrency fluctuations to dynamically monitor and match varying concurrency levels in applications while minimizing global synchronization. Our flux-based feedback-driven concurrency control technique is capable of fully recovering the performance of the best statically chosen concurrency specification (as chosen by an oracle) regardless of the initial specification for several real world applications. Further, our technique can actually improve upon the performance of the oracle chosen specification by more than 10% for certain applications through dynamic adaptation to available parallelism. We demonstrate our approach on the STAMP benchmark suite while reporting significant performance and resource utilization benefits. We also demonstrate significantly better performance when comparing against state of the art concurrency control and scheduling techniques. Further, our technique is programmer friendly as it requires no changes to application code and no offline phases.
Starting Page	927
Ending Page	938
File Size	565493
Page Count	12
File Format	PDF
ISBN	9781479937998
ISSN	15302075
e-ISBN	9781479938001
DOI	10.1109/IPDPS.2014.99
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2014-05-19
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Concurrent computing Logic gates Instruction sets Concurrency control Benchmark testing Throughput Resource management feedback-driven software transactional memory transactions concurrency control
Content Type	Text
Resource Type	Article

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