NDLI: The M-cache: a message-retrieving mechanism for multicomputer systems

Content Provider	IEEE Xplore Digital Library
Author	Draper, J.T. Ghosh, J. Athas, W.C.
Copyright Year	1991
Description	Author affiliation: Dept. of ECE, Texas Univ., Austin, TX, USA (Draper, J.T.)
Abstract	Presents the design and evaluation of the M-cache, a small, fast and intelligent memory for handling messages at the processing nodes of multicomputer systems. The M-cache provides hardware support for the message search operation often performed in message-directed programming. It also provides a mechanism for bandwidth matching between the interconnection network and local memory of a node. Through simulation experiments, the authors have studied the execution of concurrent algorithms on systems with and without M-caches to obtain relative speedup measures. The results show that a modest investment in silicon is sufficient to effect over an order of magnitude reduction in message-retrieval time. Such hardware support is needed to make the cost-effective implementation of fine-grain concurrent programs a reality.
Starting Page	258
Ending Page	265
File Size	680536
Page Count	8
File Format	PDF
ISBN	0818623101
DOI	10.1109/SPDP.1991.218271
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1991-12-02
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Hardware Routing Bandwidth Operating systems Message passing Coprocessors Multiprocessor interconnection networks Computational modeling Investments Silicon
Content Type	Text
Resource Type	Article

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