NDLI: Multi-failure fault-tolerance of embedded loops on hypercubes: issues and performance study

Content Provider	IEEE Xplore Digital Library
Author	Liang, C.T. Tsai, W.T.
Copyright Year	1990
Description	Author affiliation: Dept. of Comput. Sci., Minnesota Univ., Minneapolis, MN, USA (Liang, C.T.; Tsai, W.T.)
Abstract	The authors study the multi-failure fault-tolerance of hypercubes. Reconfiguration algorithms are proposed to reallocate the function of failed nodes to spare nodes so the communication structure of the interrupted parallel algorithms is preserved. Both clustered fault and concurrent fault are considered. Loops are selected as the embedded communication structures, where a wide variety of applications have been implemented. In early work, two classes of fault-tolerant embedded loops, Mapping II and III, have been designed and proved one-step reconfigurable for any single failure. The authors derive from shortest path algorithms a distributed reconfiguration algorithm for multiple failures on these embedded loops. Proof of reconfigurability for clustered fault is conducted for Mapping III. Performance of both mappings is evaluated by simulation with parameters such as the average number of tolerable failures, the average number of job migrations, and the utilization rate of nodes.
Starting Page	511
Ending Page	518
File Size	804292
Page Count	8
File Format	PDF
ISBN	0818620870
DOI	10.1109/SPDP.1990.143594
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1990-12-09
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Fault tolerance Hypercubes Clustering algorithms Parallel algorithms Network topology Hardware Computer science Computational modeling Large-scale systems Computer networks
Content Type	Text
Resource Type	Article

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