NDLI: Cache memories in dataflow architecture

Content Provider	IEEE Xplore Digital Library
Author	Kavi, K.M. Hurson, A.R.
Copyright Year	1995
Description	Author affiliation: Dept. of Comput. Sci. Eng., Texas Univ., Arlington, TX, USA (Kavi, K.M.)
Abstract	The recent advance in dataflow processing - to combine the dataflow paradigm with the control flow paradigm - has brought out many new challenging issues. This hybrid organization has made it possible to study familiar control flow concepts within the framework of the dataflow architecture. The concept of cache memory has proven its effectiveness in the von Neumann architecture due to the spatial and temporal localities which govern the organization of the conventional programming environment. A dataflow paradigm, does not imply to the locality. However, dataflow programs can be reordered to enhance the locality of instruction references. This can be achieved by careful partitioning of a dataflow program into vertical layers of data dependent instructions, and proper distribution and allocation of the recurrence portions of the dataflow program. Enhancing the locality of data references in flow architecture is a more challenging problem. This paper studies the design of instruction, data (operand) and I-Structure cache memories. The performance results obtained using various benchmark programs are presented and analyzed.
Starting Page	182
Ending Page	189
File Size	967463
Page Count	8
File Format	PDF
ISBN	0818671955
ISSN	10636374
DOI	10.1109/SPDP.1995.530682
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1995-10-25
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Memory architecture Parallel processing Delay Yarn Concurrent computing Processor scheduling Cache memory Computer architecture Transistors Ultra large scale integration
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
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3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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