NDLI: Shortcut interconnection: new multistage interconnection network for the locality of reference in shared memory multiprocessor system

Content Provider	IEEE Xplore Digital Library
Author	Chang-Hoon Choi Sung-Chun Kim
Copyright Year	1997
Description	Author affiliation: Dept. of Comput. Sci., Sogang Univ., Seoul, South Korea (Chang-Hoon Choi)
Abstract	The traditional UPP MINs (Unique Path Property MIN)-Omega, baseline, Multistage Cube Network-have usually been designed for constructing N/spl times/N MIN using (N/2) log/sub 2/N(O(Nlog/sub 2/N)) SEs. So far the multiple path MINs have been realized by adding additional hardware such as extra stages or duplicated data links. This paper presents a new Multistage interconnection Network (MIN) topology called Hybrid MIN. Although the Hybrid MIN is constructed using only 2N-3(O(N)) SEs which is much fewer than that of the traditional MINs, the Hybrid MIN satisfies full access capability (FAC) and has alternative paths, since there exist alternative paths and the short cut path for the localized communication. It takes advantage of exploiting the locality of reference.
Starting Page	216
Ending Page	224
File Size	712701
Page Count	9
File Format	PDF
ISBN	0818678704
DOI	10.1109/AISPAS.1997.581665
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1997-03-17
Publisher Place	Japan
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Multiprocessor interconnection networks Intelligent networks Network topology Hardware Switches Multiprocessing systems Delay Hypercubes Computer science Parallel processing
Content Type	Text
Resource Type	Article

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4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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