NDLI: Testing of hard faults in simultaneous multi-threaded processors

Content Provider	IEEE Xplore Digital Library
Author	Weglarz, E.F. Saluja, K.K. Mak, T.M.
Copyright Year	2004
Description	Author affiliation: Dept. of Electr. & Comput. Eng., Wisconsin Univ., Madison, WI, USA (Weglarz, E.F.; Saluja, K.K.)
Abstract	With the increasing circuit complexity and aggressive technology scaling, faults such as dielectric, conductor, and metallization failures are becoming more common. Traditional stuck-at testing does not detect these types of faults because these faults may be dormant and need to be stressed to manifest as "fails" (during burn-in). As voltage scaling and power consumption reduce the effectiveness of burn-in, these faults will cause failures during the useful life of the part. We propose the use of a test thread on simultaneous multi-threaded processors, to provide a means of detection of lifetime failures. In this initial study, the test thread is allowed to compete with executing programs for processor resources. When the system has only one workload thread, the test thread is able to execute with no significant impact on the workload thread. When the system has many active workload threads, the test thread has somewhat larger impact on the execution time of the workload threads.
Sponsorship	IEEE Comput. Soc. Test Technol. Tech. Council
Starting Page	95
Ending Page	100
File Size	268980
Page Count	6
File Format	PDF
ISBN	0769521800
DOI	10.1109/OLT.2004.1319665
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2004-07-14
Publisher Place	Portugal
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Yarn Circuit faults Circuit testing System testing Complexity theory Dielectrics Conductors Metallization Electrical fault detection Fault detection
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
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3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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