NDLI: Design of new front-end electronics for animal PET

Content Provider	IEEE Xplore Digital Library
Author	Deng, Z. Yeom, J.Y. Ishitsu, T. Nakazawa, M. Takahashi, H. Murayama, H.
Copyright Year	2003
Description	Author affiliation: Fac. of Eng., Univ. of Tokyo, Japan (Deng, Z.; Yeom, J.Y.; Ishitsu, T.; Nakazawa, M.)
Abstract	Highly pixilated detector modules for animal PET such as LSO-APD module require power-efficient, highly integrated and reliable front-end electronics. A new waveform sampling front-end chip for animal PET has been developed. The front-end electronics consist of a preamplifier, a variable gain amplifier (VGA) and a fast ADC per channel. The preamplifier picks up detector signals while the ADC samples the output signals of the preamplifier and converts them into digital waveforms. The VGA adjusts the signal amplitude to the maximum input range of the ADC. Digitizing the whole waveform on-chip would provide large flexibility for signal processing, e.g. the energy and time information can be extracted by either a simple linear interpolator or a more complex statistics estimator. The preamplifier, VGA and 6 bit 100 MSPS folding ADC have been designed using Rohm 0.35 /spl mu/m CMOS ASIC technology. Full custom ASIC technique allows us to integrate analog and digital circuits into one chip. The preamplifier occupies 180/spl times/100 /spl mu/m/sup 2/ and has a rise time of 22 ns while the VGA occupies 180/spl times/90 /spl mu/m/sup 2/ and have a variable gain from 3.6 to 25. The ADC occupies 0.24 mm/sup 2/ (excluding digital circuit), dissipates 1 W for 8 channels with a 3.3 V power supply and has a DNL of 0.7 LSB and INL of 1.4 LSB.
Starting Page	1543
Ending Page	1546
File Size	533194
Page Count	4
File Format	PDF
ISBN	0780376366
DOI	10.1109/NSSMIC.2002.1239615
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2002-11-10
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Animals Positron emission tomography Preamplifiers Detectors Gain CMOS technology Application specific integrated circuits Digital circuits Sampling methods Signal detection
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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