NDLI: Qualitatively modeling heterojunction bipolar transistors for optimization: a neural network approach

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1997 Proceedings IEEE/Cornell Conference on Advanced Concepts in High Speed Semiconductor Devices and Circuits

Proceedings IEEE/Cornell Conference on Advanced Concepts in High Speed Semiconductor Devices and Circuits

Proceedings of IEEE/Cornell Conference on Advanced Concepts in High Speed Semiconductor Devices and Circuits

Proceedings of IEEE/Cornell Conference on Advanced Concepts in High Speed Semiconductor Devices and Circuits

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Qualitatively modeling heterojunction bipolar transistors for optimization: a neural network approach

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[1991] Proceedings IEEE/Cornell Conference on Advanced Concepts in High Speed Semiconductor Devices and Circuits

Proceedings., IEEE/Cornell Conference on Advanced Concepts in High Speed Semiconductor Devices and Circuits,

IEEE/Cornell Conference on Advanced Concepts in High Speed Semiconductor Devices and Circuits, 1987. Proceedings.

Qualitatively modeling heterojunction bipolar transistors for optimization: a neural network approach

Content Provider	IEEE Xplore Digital Library
Author	Vai, M. Zhimin Xu Prasad, S.
Copyright Year	1993
Description	Author affiliation: Dept. of Electr. & Comput. Eng., Northeastern Univ., Boston, MA, USA (Vai, M.; Zhimin Xu; Prasad, S.)
Abstract	A neural network approach is developed to qualitatively model the relationship between fabrication process parameters and the characteristics of a heterojunction bipolar transistor (HBT). An equivalent circuit model is used as an intermediate representation format for this objective. The goal of this research project is to develop a method that can predict and explain changes in the behavior of a device without the need for precise problem formulations and computationally intensive methods. The primary use of such a neural network model is in a reverse modeling process which performs device optimization.
Starting Page	219
Ending Page	227
File Size	448370
Page Count	9
File Format	PDF
ISBN	0780308948
DOI	10.1109/CORNEL.1993.303090
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1993-08-02
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Heterojunction bipolar transistors Neural networks Equivalent circuits Fabrication Analog computers Computer networks Concurrent computing Distributed computing Semiconductor process modeling Frequency
Content Type	Text
Resource Type	Article

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