NDLI: Fast checkpointing by Write Aggregation with Dynamic Buffer and Interleaving on multicore architecture

Content Provider	IEEE Xplore Digital Library
Author	Xiangyong Ouyang Gopalakrishnan, K. Gangadharappa, T. Panda, D.K.
Copyright Year	2009
Description	Author affiliation: Department of Computer Science and Engineering, The Ohio State University (Xiangyong Ouyang; Gopalakrishnan, K.; Gangadharappa, T.; Panda, D.K.)
Abstract	Large scale compute clusters continue to grow to ever-increasing proportions. However, as clusters and applications continue to grow, the Mean Time Between Failures (MTBF) has reduced from days to hours. As a result, fault tolerance within the cluster has become imperative. MPI, the de-facto standard for parallel programming, is widely used on such large clusters. Many MPI implementations use Checkpoint/Restart schemes using the Berkeley Lab Checkpoint Restart (BLCR) Library to achieve some level of fault tolerance. However, the performance of the Checkpoint/Restart mechanism does not scale well with increasing job size. As a result, the deployment of Checkpoint/Restart mechanisms for large scale parallel applications is compromised. In our previous work, we proposed a technique to aggregate certain categories of checkpoint writes to reduce the checkpointing overhead. However, an application still experiences slow checkpoint writing because it is blocked waiting for its checkpoint file writes to complete. In this paper, we propose the Write Aggregation with Dynamic Buffer and Interleaving scheme to reduce the overhead related to checkpoint creation. By aggregating all checkpoint writes into a dynamic buffer pool and overlapping the application progress with the file writes, our algorithm is able to significantly reduce checkpoint creation overhead. In the experiments using 64 processor cores, our design demonstrates a speedup of 2.62 times in terms of checkpoint creation time when compared to the original BLCR design. Our scheme also reduces the impact of checkpointing on the application execution time from 20% to 6% when 3 checkpoints are taken during an application run.
Starting Page	99
Ending Page	108
File Size	141833
Page Count	10
File Format	PDF
ISBN	9781424449224
e-ISBN	9781424449217
DOI	10.1109/HIPC.2009.5433218
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2009-12-16
Publisher Place	India
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Checkpointing Interleaved codes Multicore processing Large-scale systems Fault tolerance Computer architecture Parallel programming Libraries Aggregates Writing
Content Type	Text
Resource Type	Article

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