NDLI: A 0.13/spl mu/m CMOS low-voltage high-linearity mixer for UWB receiver

Content Provider	IEEE Xplore Digital Library
Author	Hua Shen Li-Wu Yang Xin Lv
Copyright Year	2007
Description	Author affiliation: Beijing Inst. of Technol., Beijing (Hua Shen; Xin Lv)
Abstract	A novel 0.13 mum CMOS low-voltage high-linearity mixer for direct-conversion UWB receiver is presented. The topology of the wideband mixer employing a shunt resistor in input-matching network is analyzed in details. A CMOS inverter with current-reuse technology is used in the transconductance stage. The transconductance stage and the switching stage are ac-coupled with capacitors. LC resonators were adapted in design to replace commonly used current sources. The methods of improvement on linearity, gain and noise are analyzed. The ICs were fabricated with SMIC 0.13 mum RFCMOS technology. The measured IIP3 of 10.2 dBm, with a power gain of -4.2 dB, and SSB noise figure of 12 dB were obtained. A low dissipating power of 5.1 mW at 1 V supply voltage was also achieved.
Starting Page	1
Ending Page	4
File Size	2319819
Page Count	4
File Format	PDF
ISBN	1424410487
DOI	10.1109/ICMMT.2007.381464
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2007-04-18
Publisher Place	China
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Transconductance Network topology Wideband Resistors Inverters CMOS technology Capacitors Linearity Power measurement Gain measurement high-linearity UWB mixer
Content Type	Text
Resource Type	Article

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