NDLI: IP reuse in an MDA MPSoPC co-design approach

Content Provider	IEEE Xplore Digital Library
Author	Vidal, J. de Lamotte, F. Gogniat, G. Diguet, J.-P. Soulard, P.
Copyright Year	2009
Description	Author affiliation: University of Bretagne Sud - UEB - CNRS, UMR 3192, Lab-STICC, Centre de Recherche - BP 92116 - F-56321 Lorient Cedex - France (Vidal, J.; de Lamotte, F.; Gogniat, G.; Diguet, J.-P.) \|\| SODIUS - 6 rue de Cornouaille - F-44300 NANTES - France (Soulard, P.)
Abstract	With the increasing hardware capacity, embedded systems are becoming more and more complex, requiring new design techniques/methods. UML allows higher abstraction level system modeling and MDA techniques allow automatic code generation. In this paper we propose a UML/MDA approach to rapidly model and automatically generate MPSoPC systems. Our approach uses MARTE as extension mechanism in order to allow real-time and platform embedded systems modeling. Our goal is to provide an unique model for MPSoPC co-design, closing the gap between hardware and software modeling. Also, we propose an efficient method for IP (Intellectual Property) reuse allowing automatically platform code generation. Our tests have shown gains in the order of 30% in design time.
Starting Page	256
Ending Page	259
File Size	501119
Page Count	4
File Format	PDF
ISBN	9781424458141
e-ISBN	9781424458165
DOI	10.1109/ICM.2009.5418638
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2009-12-19
Publisher Place	Morocco
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Unified modeling language Embedded system Hardware Real time systems Space exploration Field programmable gate arrays Intellectual property Application software Costs Focusing
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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