NDLI: Testudo: Heavyweight security analysis via statistical sampling

Content Provider	IEEE Xplore Digital Library
Author	Greathouse, J.L. Wagner, I. Ramos, D.A. Bhatnagar, G. Austin, T. Bertacco, V. Pettie, S.
Copyright Year	2008
Description	Author affiliation: Adv. Comput. Archit. Lab., Univ. of Michigan, Ann Arbor, MI (Greathouse, J.L.; Wagner, I.; Ramos, D.A.; Bhatnagar, G.; Austin, T.; Bertacco, V.; Pettie, S.)
Abstract	Heavyweight security analysis systems, such as taint analysis and dynamic type checking, are powerful technologies used to detect security vulnerabilities and software bugs. Traditional software implementations of these systems have high instrumentation overhead and suffer from significant performance impacts. To mitigate these slowdowns, a few hardware-assisted techniques have been recently proposed. However, these solutions incur a large memory overhead and require hardware platform support in the form of tagged memory systems and extended bus designs. Due to these costs and limitations, the deployment of heavyweight security analysis solutions is, as of today, limited to the research lab. In this paper, we describe Testudo, a novel hardware approach to heavyweight security analysis that is based on statistical sampling of a programpsilas dataflow. Our dynamic distributed debugging reduces the memory overhead to a small storage space by selectively sampling only a few tagged variables to analyze during any particular execution of the program. Our system requires only small hardware modifications: it adds a small sample cache to the main processor and extends the pipeline registers to propagate analysis tags. To gain high analysis coverage, we rely on a population of users to run the program, sampling a different random set of variables during each new run. We show that we can achieve high coverage analysis at virtually no performance impact, even with a reasonably-sized population of users. In addition, our approach even scales to heavyweight debugging techniques by keeping per-user runtime overheads low despite performing traditionally costly analyses. Moreover, the low hardware cost of our implementation allows it to be easily distributed across large user populations, leading to a higher level of security analysis coverage than previously.
Starting Page	117
Ending Page	128
File Size	915230
Page Count	12
File Format	PDF
ISBN	9781424428366
ISSN	10724451
DOI	10.1109/MICRO.2008.4771784
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2008-11-08
Publisher Place	Italy
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Testing Sampling methods Hardware Power system security Costs Data security Debugging Performance analysis Computer bugs Software performance
Content Type	Text
Resource Type	Article

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