NDLI: Incremental commit groups for non-atomic trace processing

Content Provider	IEEE Xplore Digital Library
Author	Yourst, M.T. Ghose, K.
Copyright Year	2005
Description	Author affiliation: Dept. of Comput. Sci., New York State Univ., Binghamton, NY, USA (Yourst, M.T.; Ghose, K.)
Abstract	We introduce techniques to support efficient non-atomic execution of very long traces on a new binary translation based, /spl times/86-64 compatible VLIW microprocessor. Incrementally committed long traces significantly reduce wasted computations on exception induced rollbacks by retaining the correctly committed parts of traces. We divide each scheduled trace into multiple commit groups; groups are committed to the architectural state after all instructions within and prior to each group complete without exceptions. Architectural state updates are only visible after future commit points are deferred using a simple hardware commit buffer. We employ a commit depth predictor to predict how many groups a trace will complete, thereby eliminating pipeline flushes on repeated rollbacks. Unlike atomic traces, we allow instructions to be freely scheduled across commit points throughout the trace to maximize ILP. Commit groups are formed after scheduling, allowing the commit points terminating each group to be inserted more optimally. Commit groups promote significantly faster convergence on optimized traces, since we salvage partially executed traces and splice the working parts together into new optimized traces. We use detailed models to demonstrate how commit groups substantially improve performance (on average, over 1.5/spl times/ on SPEC 2000) relative to atomic traces.
Starting Page	12
Ending Page	80
File Size	614373
Page Count	69
File Format	PDF
ISBN	0769524400
DOI	10.1109/MICRO.2005.23
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2005-11-12
Publisher Place	Spain
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	VLIW Hardware Instruction sets Microprocessors Processor scheduling Out of order Operating systems Decoding Computer science Pipelines trace prediction binary translation commitment
Content Type	Text
Resource Type	Article

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