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Improving code density using compression techniques

Content Provider	IEEE Xplore Digital Library
Author	Lefurgy, C. Bird, P. Chen, I.-C. Mudge, T.
Copyright Year	1997
Description	Author affiliation: Dept. of Electr. Eng. & Comput. Sci., Michigan Univ., Ann Arbor, MI, USA (Lefurgy, C.)
Abstract	Proposes a method for compressing programs in embedded processors where the instruction memory size dominates the cost. A post-compilation analyzer examines a program and replaces common sequences of instructions with a single instruction codeword. A microprocessor executes the compressed instruction sequences by fetching codewords from the instruction memory, expanding them back to the original sequence of instructions in the decode stage, and issuing them to the execution stages. We apply our technique to the PowerPC, ARM and i386 instruction sets and achieve an average size reduction of 39%, 34% and 26%, respectively, for SPEC CINT95 programs.
Starting Page	194
Ending Page	203
File Size	1066726
Page Count	10
File Format	PDF
ISBN	0818679778
ISSN	10724451
DOI	10.1109/MICRO.1997.645810
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1997-12-03
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Costs Encoding Microprocessors Decoding Instruction sets Embedded system Bandwidth Birds Statistics Circuits
Content Type	Text
Resource Type	Article

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