NDLI: Exceeding the dataflow limit via value prediction

Content Provider	IEEE Xplore Digital Library
Author	Lipasti, M.H. Shen, J.P.
Copyright Year	1996
Description	Author affiliation: Dept. of Electr. & Comput. Eng., Carnegie Mellon Univ., Pittsburgh, PA, USA (Lipasti, M.H.)
Abstract	For decades, the serialization constraints imposed by true data dependences have been regarded as an absolute limit-the dataflow limit-on the parallel execution of serial programs. This paper proposes a new technique-value prediction-for exceeding that limit that allows data dependent instructions to issue and execute in parallel without violating program semantics. This technique is built on the concept of value locality which describes the likelihood of the recurrence of a previously-seen value within a storage location inside a computer system. Value prediction consists of predicting entire 32- and 64-bit register values based on previously-seen values. We find that such register values being written by machine instructions are frequently predictable. Furthermore, we show that simple microarchitectural enhancements to a modern microprocessor implementation based on the PowerPC 620 that enable value prediction can effectively exploit value locality to collapse true dependences, reduce average result latency and provide performance gains of 4.5%-23% (depending on machine model) by exceeding the dataflow limit.
Starting Page	226
Ending Page	237
File Size	1390319
Page Count	12
File Format	PDF
ISBN	0818676418
DOI	10.1109/MICRO.1996.566464
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1996-12-02
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Delay Registers Parallel processing Strain control Computer aided instruction Microarchitecture Pipelines Arithmetic Modems Microprocessors
Content Type	Text
Resource Type	Article

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