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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Deitrich, B.L. Hwu, W.W. |
| Copyright Year | 1996 |
| Description | Author affiliation: Center for Reliable & High Performance Comput., Illinois Univ., Urbana, IL, USA (Deitrich, B.L.) |
| Abstract | Path-oriented scheduling methods, such os trace scheduling and hyperblock scheduling, use speculation to extract instruction-level parallelism from control-intensive programs. These methods predict important execution paths in the current scheduling scope using execution profiling or frequency estimation. Aggressive speculation is then applied to the important execution paths, possibly at the cost of degraded performance along other paths. Therefore, the speed of the output code can be sensitive to the compiler's ability to accurately predict the important execution paths. Prior work in this area has utilized the speculative yield function by Fisher, coupled with dependence height, to distribute instruction priority among execution paths in the scheduling scope. While this technique provides more stability of performance by paying attention to the needs of all paths, it does not directly address the problem of mismatch between compile-time prediction and run-time behavior. The work presented in this paper extends the speculative yield and dependence height heuristic to explicitly minimize the penalty suffered by other paths when instructions are speculated along a path. Since the execution time of a path is determined by the number of cycles spent between a path's entrance and exit in the scheduling scope, the heuristic attempts to eliminate unnecessary speculation that delays any path's exit. Such control of speculation makes the performance much less sensitive to the actual path taken at run time. The proposed method has a strong emphasis on achieving minimal delay to all exits. Thus the name, speculative hedge, is wed. This paper presents the speculative hedge heuristic, and shows how it controls over-speculation in a superblock/hyperblock scheduler. The stability of output code performance in the presence of execution variation is demonstrated with sit programs from the SPEC CINT92 benchmark suite. |
| Starting Page | 70 |
| Ending Page | 79 |
| File Size | 1150706 |
| Page Count | 10 |
| File Format | |
| ISBN | 0818676418 |
| DOI | 10.1109/MICRO.1996.566451 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 1996-12-02 |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Processor scheduling Delay Frequency estimation Stability Computer aided instruction Concurrent computing Parallel processing Costs Profitability Runtime |
| Content Type | Text |
| Resource Type | Article |
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