NDLI: Wear-leveling scheduler for phase-change RAM main memory for mobile consumer electronics

Content Provider	IEEE Xplore Digital Library
Author	Sang-Hoon Park Hyeokjun Seo Taehee You Jin-Young Kim Eui-Young Chung
Copyright Year	2014
Description	Author affiliation: Sch. of Electr. & Electron. Eng., Yonsei Univ., Seoul, South Korea (Sang-Hoon Park; Hyeokjun Seo; Taehee You; Jin-Young Kim; Eui-Young Chung)
Abstract	Main memory systems based on phase-change random access memory (PRAM) have been actively researched due to low static power consumption, which is adequate to mobile consumer electronics. However, PRAMs require wear-leveling, which incur performance overhead, to compensate their limited life-time. Even though many works have discussed the overhead in terms of write latency, read latency is also affected and the degradation is even severer since PRAM read is faster than write. Consequently, this paper proposes a wear-leveling scheduler that reduces the effect of wear-leveling overhead on read latency. The proposed method which can cooperate with various wear-leveling algorithms enables wear-leveling only when no read request is issued for a period longer than the pre-defined threshold. In spite of simplicity, a PRAM-based memory system equipped with the proposed method achieves 50% shorter read latency without affecting wear-leveling performance.
Starting Page	1
Ending Page	3
File Size	205436
Page Count	3
File Format	PDF
ISBN	9781479945924
DOI	10.1109/ISCE.2014.6884311
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2014-06-22
Publisher Place	South Korea
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Phase change random access memory Standards Memory management Mobile communication scheduling phase-change RAM main memory wear-leveling
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

A wear-leveling-aware dynamic stack for PCM memory in embedded systems

W-Buddy: Wear-out-aware memory allocator for SCRAM-based low power mobile systems

Wear-leveling for PCM main memory on embedded system via page management and process scheduling

Age-based PCM wear leveling with nearly zero search cost

A Software-hardware Collaborating Framework for Wear Leveling on Phase Change Memory

A low hardware cost wear-leveling algorithm for application of smart mobile terminals

Enhancing lifetime and security of PCM-based Main Memory with Start-Gap Wear Leveling

Software enabled wear-leveling for hybrid PCM main memory on embedded systems

Enhanced Wear-Rate Leveling for PRAM Lifetime Improvement Considering Process Variation

Wear-leveling scheduler for phase-change RAM main memory for mobile consumer electronics

Similar Documents

A wear-leveling-aware dynamic stack for PCM memory in embedded systems

W-Buddy: Wear-out-aware memory allocator for SCRAM-based low power mobile systems

Wear-leveling for PCM main memory on embedded system via page management and process scheduling

Age-based PCM wear leveling with nearly zero search cost

A Software-hardware Collaborating Framework for Wear Leveling on Phase Change Memory

A low hardware cost wear-leveling algorithm for application of smart mobile terminals

Enhancing lifetime and security of PCM-based Main Memory with Start-Gap Wear Leveling

Software enabled wear-leveling for hybrid PCM main memory on embedded systems

Enhanced Wear-Rate Leveling for PRAM Lifetime Improvement Considering Process Variation

Wear-leveling scheduler for phase-change RAM main memory for mobile consumer electronics