NDLI: Microelectronics BEOL reliability basics and evolution

Content Provider	IEEE Xplore Digital Library
Author	Sullivan, Tim D.
Copyright Year	2012
Description	Author affiliation: IBM Microelectronics, 1000 River St., Essex Junction, VT (Sullivan, Tim D.)
Abstract	Summary form only given. The set of traditional back-end-of-line (BEOL) reliability concerns includes electromigration (EM), mechanical stability, stress-induced voiding (SV) and corrosion for aluminum (Al) metallizations. With the introduction of dual-damascene Cu and low-k BEOL dielectric materials, combined with continued reduction in dimensions required for increased circuit density, time-dependent dielectric breakdown (TDDB) of both inter- and intra-level dielectric has become an additional concern. All of the standard testing is still carried on for each of these failure mechanisms, but trends to include large features, such as inductors for RF parts and through-Si vias (TSV's) for chip stacking, in combination with progressively smaller minimum line widths and pitches have lead to a divergence in both testing requirements and test structures to ensure chip reliability. In addition, emerging applications using high voltages, thick wiring levels and thick dielectric layers are requiring much greater test voltages and currents in order to produce failure distributions adequate for lifetime projections. These challenges promise to provide continued entertainment for BEOL Reliability engineers for the next few years.
Sponsorship	IEEE Electron Devices Soc.
Starting Page	205
Ending Page	205
File Size	97688
Page Count	1
File Format	PDF
ISBN	9781467327497
ISSN	19308841
e-ISBN	9781467327527
DOI	10.1109/IIRW.2012.6468960
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2012-10-14
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Content Type	Text
Resource Type	Article

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Convergence and interaction of BEOL and BE reliability methodology

14nm BEOL TDDB reliability testing and defect analysis

Reliability degradation impact by ultra low-k dielectrics and improvement study for BEOL process beyond 28nm technology

Modeling of interconnect stress evolution during BEOL process and packaging

Impact of Cu TSVs on BEOL metal and dielectric reliability

Detecting Reliability Attacks during Split Fabrication using Test-only BEOL Stack

TDDB improvement of copper/dielectric in the highly-integrated BEOL structure for 28nm technology node and beyond

BEOL Process Effects on ePCM Reliability

Impact of process variability on BEOL TDDB lifetime model assessment

Microelectronics BEOL reliability basics and evolution

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