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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Gajski, D.D. |
| Copyright Year | 2003 |
| Description | Author affiliation: Center for Embedded Comput. Syst., California Univ., Irvine, CA, USA (Gajski, D.D.) |
| Abstract | Summary form only given. With complexities of systems rising almost daily, the system community has been searching for new methodology that can handle given complexities with increased productivity and decreased times-to-market. The obvious solution that comes to mind is increasing levels of abstraction, or in other words, increasing the size of the basic building blocks. However, it is not clear what these basic blocks should be beyond the obvious processors and memories. Furthermore, if a design consists of SW and HW, the modeling language should be C since standard processors come only with C compilers. Unfortunately, the C language was developed for describing software and not hardware. It is missing basic constructs for expressing hardware concurrency and communication among components. Therefore, we need a well defined design flow, with well defined models and a modeling language that can be compiled with standard compilers and that is capable of modeling hardware and software on different levels of abstraction including cycle-level accuracy. In order to find the solution, we look first at the system gap between SW and HW designs and then try to bridge this gap by looking at different levels of abstraction. In addition, we define example semantics for each abstraction level, necessary styles of modeling and required model refinements to bring the specification to a cycle-accurate implementation level. We exemplify this by looking in detail at the RTL and SL abstraction levels. From this point of view we analyze the basic approaches in the academia and the industry today, and try to find out where we, as a design community, are going. We finish with a prediction and a roadmap to achieve the ultimate goal of increasing productivity in system design by more then 1000X and reducing expertise level needed for design of complex systems to the basic principles of design science only. |
| Sponsorship | Int. Assoc. Math. & Comput. Simulation: IEEE et al |
| File Size | 60073 |
| File Format | |
| ISBN | 9539676967 |
| ISSN | 13301012 |
| DOI | 10.1109/ITI.2003.1225316 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2003-06-19 |
| Publisher Place | Croatia |
| Access Restriction | Subscribed |
| Rights Holder | SRCE University Computing Centre |
| Subject Keyword | Hardware Productivity Concurrent computing Software standards Bridges Refining Information technology |
| Content Type | Text |
| Resource Type | Article |
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