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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Decina, M. Giacomazzi, P. Pattavina, A. |
| Copyright Year | 1991 |
| Description | Author affiliation: Dept. of Electron., Polytech. of Milan, Cefriel, Italy (Decina, M.) |
| Abstract | A new class of asynchronous transfer mode (ATM) switching architectures for broadband packet networks, called Shuffleout, is introduced. Its interconnection network is a multistage structure built out of unbuffered 2*4 switching elements. Shuffleout is basically an output-queued architecture in which the number of cells that can be concurrently switched from the inlets to each output queue equals the number of stages in the interconnection network. The switching element operates the cell self-routing adopting a shortest path algorithm which, in case of conflict for interstage links, is coupled with deflection routing. The specific architecture presented is called Closed-Loop Shuffleout, since the cells that cross the whole interconnection network without entering the addressed output queues are lost. The key target of the proposed architecture is coupling the implementation feasibility of a self-routing switch with the desirable traffic performance typical of output queueing. |
| Starting Page | 1254 |
| Ending Page | 1263 |
| File Size | 891750 |
| Page Count | 10 |
| File Format | |
| ISBN | 0879426942 |
| DOI | 10.1109/INFCOM.1991.147648 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 1991-04-07 |
| Publisher Place | USA |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Multiprocessor interconnection networks Routing Asynchronous transfer mode Switches Telecommunication traffic Traffic control Hardware Proposals Telecommunication switching Packet switching |
| Content Type | Text |
| Resource Type | Article |
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