NDLI: Hardware-in-the-loop closed-loop experiments with an FPGA-based permanent magnet synchronous motor drive system and a rapidly prototyped controller

Content Provider	IEEE Xplore Digital Library
Author	Dufour, C. Lapointe, V. Belanger, J. Abourida, S.
Copyright Year	2008
Description	Author affiliation: Opal-RT Technol., Montreal, QC (Dufour, C.; Lapointe, V.; Belanger, J.; Abourida, S.)
Abstract	Presented in this paper are the results of closed-loop control experiments using a virtual permanent magnet synchronous motor (PMSM) drive implemented on a field- programmable gate array (FPGA) card connected to an external controller. The FPGA-based PMSM motor drive is implemented on an eDRIVEsim simulator, based on the RT-LAB platform. The eDRIVEsim simulator implements 2 types of motor drive models, Park (d-q) and Finite Element Analysis (FEA), on an FPGA card of the simulator. The FPGA-based motor model is designed with Xilinx System Generator (XSG) blockset with no HDL hand coding. Both motor models compute motor currents using a phase-domain algorithm solver that can take into account the instantaneous variation of inductance and non-sinusoidal induced voltage. The FEA-type model uses inductance and Back-EMF profiles computed with JMAG-RT. The d-q model uses sinusoidal induced Back-EMF voltage and phase inductance values computed from Ld and Lq using the well-known Park transformation. A 3-phase IGBT inverter implemented in the FPGA chip drives the PMSM machine. The PWM controller is designed using Rapid Control Prototyping (RCP) methodology based on Simulink. It is implemented on an separate RT-LAB system using standard Opal-RT FPGA-based I/O cards for Analog Input capture and PWM generation. The paper presents results from the closed-loop control of the PMSM drive in both current control and speed control modes and discusses the advantages of using such a virtual test bench for motor drives.
Starting Page	2152
Ending Page	2158
File Size	1399024
Page Count	7
File Format	PDF
ISBN	9781424416653
DOI	10.1109/ISIE.2008.4677105
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2008-06-30
Publisher Place	UK
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Permanent magnet motors Prototypes Control systems Field programmable gate arrays Pulse width modulation Motor drives Computational modeling Synchronous motors Inductance Analytical models
Content Type	Text
Resource Type	Article

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4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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