NDLI: Quantitative understanding of mobility degradation due to remote charge scattering

Content Provider	IEEE Xplore Digital Library
Author	Saito, S. Torii, K. Hiratani, M. Onai, T.
Copyright Year	2001
Description	Author affiliation: Central Res. Lab., Hitachi Ltd., Tokyo, Japan (Saito, S.)
Abstract	Si MOSFETs face the scaling limit of the gate SiO/sub 2/ thickness t/sub ox/. It is reported that the drive current does not increase, even though one may make gate oxide thinner than 1.3 nm (Timp et al, 1998). Besides the large direct tunneling currents, there is concern over the mobility degradation inherent to MOSFETs with an ultrathin gate oxide (Yu et al, 2000). However, the mechanism of the mobility degradation has not been fully elucidated to date. Mobility degradation due to remote charge scattering (RCS) is considered to be one cause of the drive current reduction. RCS results from the depletion charge in the poly-Si gate. Since the depletion charge is separated from the channel carriers by the gate oxide, the RCS-limited mobility, /spl mu//sub RCS/, is negligible when the gate oxide is thick. Recently, the use of an ultra-thin SiO/sub 2/ with t/sub ox/ less than 1.0 nm has been reported for sub 50 nm MOSFETs (Chau et al, 2000). In such MOSFETs, /spl mu//sub RCS/ may well reduce the total effective mobility, /spl mu//sub eff/, since the number of scatters is as large as the inversion charge. We have extended previous theories (Krishnan et al, 1998; Yang et al, 2000; Ando et al, 1982) by precise calculation of the potential, and found that the calculated mobility is consistent with recent experimental results (Takagi et al, 2001).
Sponsorship	JSAP: Japan Soc. Appl. Phys.
Starting Page	116
Ending Page	119
File Size	236514
Page Count	4
File Format	PDF
ISBN	4891140216
DOI	10.1109/IWGI.2001.967559
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2001-11-01
Publisher Place	Japan
Access Restriction	Subscribed
Rights Holder	Japan Soc of Applied Physics
Subject Keyword	Degradation MOSFETs Particle scattering Quantization Laboratories Tunneling Partial response channels Dielectrics Quantum mechanics Fourier transforms
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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