NDLI: Compatibility of candidate high permittivity gate oxides with front and backend processing conditions

Content Provider	IEEE Xplore Digital Library
Author	Kingon, A.I. Maria, J.-P. Wicaksana, D. Hoffman, C. Stemmer, S.
Copyright Year	2001
Description	Author affiliation: Dept. of Mater. Sci. & Eng., North Carolina State Univ., Raleigh, NC, USA (Kingon, A.I.)
Abstract	The need for new, high permittivity dielectrics for gate stacks in CMOS devices is now well recognized. The timescales for the requirements is laid out in recent issues of the Semiconductor Industry Association Roadmap. The most pressing requirement is for low powered MOSFETs. Research into high permittivity candidate dielectrics has therefore proceeded with urgency over the past 3 years. In general, two approaches are possible. Industry would prefer the direct replacement of SiO/sub 2/ as the gate dielectric, while making relatively few changes to the subsequent process conditions. This would require that the alternative dielectric be capable of surviving the high temperature rapid thermal anneals (typically over 1000/spl deg/C) required for dopant activation, in addition to the reducing backend anneals used to ensure low contact resistances for the interconnect structures. An alternative approach is to determine optimum process conditions for the gate dielectric, and adapt the CMOS process flow to accommodate this process. Relatively few resources have to date been expended to determine whether direct replacement is a possibility. This question is thus the research topic addressed in this paper. We address the question by establishing the conditions for thermodynamic stability of candidate dielectrics at elevated temperature, and the conditions under which specific reactions occur. We confirmed our reaction models by measuring the properties of appropriate MOS capacitors after high temperature processing.
Sponsorship	JSAP: Japan Soc. Appl. Phys.
Starting Page	36
Ending Page	41
File Size	546081
Page Count	6
File Format	PDF
ISBN	4891140216
DOI	10.1109/IWGI.2001.967543
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2001-11-01
Publisher Place	Japan
Access Restriction	Subscribed
Rights Holder	Japan Soc of Applied Physics
Subject Keyword	Permittivity Temperature Rapid thermal annealing Dielectric devices Electronics industry Pressing MOSFETs Rapid thermal processing Thermal resistance CMOS process
Content Type	Text
Resource Type	Article

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