NDLI: Design and construction of a PC-based stack machine simulator for undergraduate computer science and engineering courses

Content Provider	IEEE Xplore Digital Library
Author	Khan, F. Anwar, S.
Copyright Year	1997
Description	Author affiliation: Dept. of Comput. Sci., Texas Univ., Brownsville, TX, USA (Khan, F.)
Abstract	A senior level compiler design course in an undergraduate computer science and engineering program usually deals with teaching the students the basics of compiler construction. Since the impetus of such an undergraduate course is to deal with the issues of compiler construction rather than intricacies of different machines, it is instructive to generate the code for a simple stack machine, incorporating a hardware stack, rather than dealing with a register-based machine such as a microcomputer. However, the educational institutions have the latter as a well established computing platform. Therefore, for testing a constructed compiler for a stack machine, it is feasible to make a microcomputer-based stack machine simulator. This paper presents the working design of a PC-based stack machine simulator developed by the authors for use in an undergraduate computer science and engineering course in compiler design. This paper begins by putting forward the architecture of the virtual stack machine for which the simulator is designed and constructed. The stack machine's instruction set is explained and then followed by a discussion of its encoding scheme. The main data structures and the different stages of the simulator are elaborated upon, culminating in a description of the salient features of the simulator that make it an effective tool in a compiler construction course. This includes the simulator's different analytical features such as measuring space-time complexity to analyze the effectiveness of a compiled code.
Starting Page	1234
Ending Page	1238
File Size	496362
Page Count	5
File Format	PDF
ISBN	0780340868
ISSN	01905848
DOI	10.1109/FIE.1997.632642
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1997-11-05
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Computational modeling Program processors Computer science Design engineering Education Hardware Microcomputers Educational institutions Testing Computer simulation
Content Type	Text
Resource Type	Article
Subject	Education Computer Science Applications Software

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
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9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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