NDLI: A 2.6 GHz, 25 fs jitter, differential chip scale oscillator that is <1 $mm^{2}$ in area and 0.25mm tall

Content Provider	IEEE Xplore Digital Library
Author	Fan Zhang Gilbert, S.R. Bi, F. Ortiz, S. Otis, B. Ruby, R.C.
Copyright Year	2012
Description	Author affiliation: Avago Technologies, San Jose, CA (Gilbert, S.R.; Bi, F.; Ortiz, S.; Ruby, R.C.) \|\| University of Washington, Seattle, Washington 98195 (Fan Zhang; Otis, B.)
Abstract	We demonstrate a 2.6 GHz chip-scale oscillator that measured phase noise better than −150 dBc/Hz at 1 MHz offset and integrated jitter of just 25 fs. The part was designed with differential out and drives a 100 Ohm differential load with a mean voltage swing of 100 to 200 mV. The phase noise at 10 kHz offset is −110 dBc/Hz. The device runs at 3.3V and Idd is just over 9mA (including buffer). Another variant is designed to have an on-chip varactor allowing tuning of 615 ppm/V over the targeted 0.5 to 1.8 V tuning range. Here, the integrated jitter degrades by 2X at 0 V Vtune and we measured 85 fs jitter at 1.5 V Vtune. Still, the integrated jitter was well below 100 fs. The all-silicon packaged part is designed to directly solder down onto a PCB. There are no bond wires used in the assembly of this device. The height of the soldered part is under 0.25 mm, and the area of the die is less than 1 $mm^{2}.$ The oscillator uses a Zero Drift Resonator (ZDR) FBAR and we see about +/− 100 ppm temperature drift from −40C to +110°C. The design uses a cross-coupled architecture with the ZDR and is ac-coupled to a buffer amplifier.
Starting Page	1
Ending Page	4
File Size	1162980
Page Count	4
File Format	PDF
ISBN	9781457718212
ISSN	10756787
e-ISBN	9781457718205
DOI	10.1109/FCS.2012.6243751
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2012-05-21
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Film bulk acoustic resonators Temperature measurement Resonant frequency Frequency measurement Jitter Phase noise quartz replacement FBAR BAW frequency reference oscillator
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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