NDLI: Accelerating hardware simulation: Testbench code emulation

Content Provider	IEEE Xplore Digital Library
Author	Mavroidis, I. Papaefstathiou, I.
Copyright Year	2008
Description	Author affiliation: Microprocessor & Hardware Lab. (MHL), Tech. Univ. of Crete (TUC), Chania (Mavroidis, I.; Papaefstathiou, I.)
Abstract	Todaypsilas verification challenges require high-performance simulation solutions, such as hardware simulation accelerators and emulators, that have been in use in hardware and electronic system design centers for approximately the last decade. In particular, in order to accelerate functional simulation, hardware emulation is used so as to offload calculation-intensive tasks from the software simulator. However, the communication overhead between the software simulator and the hardware emulator is becoming a new critical bottleneck. In our work we introduce a novel way of repartitioning the simulation between software and hardware in order to minimize this communication bottleneck. Using the techniques described in this paper we are able to offload a big part of the work that is traditionally done by the software simulator, onto the hardware emulator. Our experiments, using real-world designs, demonstrate that the proposed method reduces significantly the communication overhead and outperforms the conventional hardware emulation systems by a factor of more than 7. Finally, we provide a way of observing and modifying the internal state of the hardware emulator while the test is running.
Starting Page	129
Ending Page	136
File Size	132125
Page Count	8
File Format	PDF
ISBN	9781424437832
DOI	10.1109/FPT.2008.4762375
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2008-12-08
Publisher Place	Taiwan
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Life estimation Emulation Field programmable gate arrays Acceleration Printed circuits Hardware design languages Communication system software Electronic equipment testing System testing Microprocessors
Content Type	Text
Resource Type	Article

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4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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