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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Sullivan, G.F. Masson, G.M. |
| Copyright Year | 1990 |
| Description | Author affiliation: Dept. of Comput. Sci., Johns Hopkins Univ., Baltimore, MD, USA (Sullivan, G.F.; Masson, G.M.) |
| Abstract | A technique for achieving fault tolerance in hardware and software systems is introduced. When used for software fault tolerance, this technique uses time and software redundancy and can be outlined as follows. In the initial phase, a program is run to solve a problem and store the results. In addition, this program leaves behind a trail of data, called a certification trail. In the second phase, another program is run, and it solves the original problem again. This program, however, has access to the certification trail left by the first program. Because of the availability of the certification trail, the second phase can be performed by a less complex program and can execute more quickly. In the final phase, the two results are compared, and if they agree, the results are accepted as correct; otherwise, an error is indicated. Cases in which the second phase can be run concurrently with the first and act as a monitor are discussed.< |
| Starting Page | 423 |
| Ending Page | 431 |
| File Size | 652401 |
| Page Count | 9 |
| File Format | |
| ISBN | 081862051X |
| DOI | 10.1109/FTCS.1990.89397 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 1990-06-26 |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Certification Fault tolerance Error correction Fault detection Hardware Redundancy Fault tolerant systems Computer science Availability Monitoring |
| Content Type | Text |
| Resource Type | Article |
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