NDLI: Evolvable Internet hardware platforms

Content Provider	IEEE Xplore Digital Library
Author	Lockwood, J.W.
Copyright Year	2001
Description	Author affiliation: Dept. of Comput. Sci., Washington Univ., St. Louis, MO, USA (Lockwood, J.W.)
Abstract	Network routing platforms and Internet firewalls of the next decade will be radically different than the platforms of today. They will contain modular components that can be dynamically reconfigured over the Internet. But, unlike the active networks that are in the research labs today, these new platforms will not suffer from the performance penalty of processing packets in software. These platforms will implement routing, packet filtering and queuing functions in reprogrammable hardware. The hardware of the system will evolve over time as packet processing algorithms and protocols progress. The granularity of the system will be configurable down to the level of the logic gates. These logic gates, and the interconnections between them, will be reconfigurable over the Internet. These routers will enable new services to be rapidly deployed over the Internet and operate at the full rate of the Internet backbone link. Through the development of the Field Programmable Port Extended (FPX), a platform has been built that demonstrates how networking modules can be used for rapid prototype and deployment of networking hardware. The platform includes high-speed network interfaces, multiple banks of memory and Field Programmable Gate Array (FPGA) logic. Applications have been developed for the FPX that include Internet packet routing, data queuing and application-level data modification. The FPX is currently used as a component in an evolvable router.
Sponsorship	NASA
Starting Page	271
Ending Page	279
File Size	1019510
Page Count	9
File Format	PDF
ISBN	0769511805
DOI	10.1109/EH.2001.937971
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2001-07-12
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Hardware Routing Logic gates Reconfigurable logic Web and internet services Field programmable gate arrays Programmable logic arrays IP networks Software performance Information filtering
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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